Nowadays in most RF systems like radars or SDRs (Software Defined Radios) where very fast converters are used (ADCs and DACs), at some point, there is a need to record received data or store data to be sent. Today we will briefly talk about it and about some issues related to it.
Fast ADC/DAC – how fast?
Of course, the speed is relative – let’s compare the data rate of some ADCs – AD9684 and AD9689.
|Number of channels
|Parallel LVDS (DDR)
The first one is a relatively slow converter with simple parallel LVDS output interface compared to latter one which is one of fastest converters from Analog Devices with modern JESD204B output interface. The data is sent to FPGA via 14 data lines (D[13:0]) + clock (DCO). Because data is transferred in DDR (double data rate) mode, we receive data on each clock edge (depending on the ADC configuration we can get data from either one or two channels). The data rate is 14 bits x 2 channels x 500 MSamples = 14 Gb/s. For the faster one, the number will be even higher – 14 bits x 2 channels x 2 GSamples = 56Gbit/s (assuming no decimation is done in ADC). That shows us the magnitude of data passed into the FPGA.
The good news is that this amount of data is nothing overwhelming for modern FPGAs. Also, it’s quite rare to keep that rate on the whole processing path. Usually, data is filtered, decimated etc. which decrease the rate multiple times. The problem appears when we want to pass some of that data to PC (for some simulation etc.) especially when we want to do it in real-time (not just some recorded periods of time). So what options do we have when we want to transmit let’s say 8 Gbit/s data stream?
10G (and higher) Ethernet, Aurora, SFPDP?
The main problem is the lack of such fast interfaces in modern PCs. Most of them have got 1G Ethernet but faster one? It will require an additional card.
The (very fast) Ethernet sounds like a very good option – the standard is well known by programmers, there’s a lot of tools. The data can be transmitted via network infrastructure (routers, switches). One of the disadvantages is the need of IP core for FPGA which will take care of encapsulation of data into packets and send them using fast transceivers. Usually, the cost of such IP starts from 5.000 USD. The similar case is SFPDP – standard often used in the defense sector. In case of FPGAs from Xilinx, we can use an Aurora protocol which is included in Vivado license. It allows us to easily transfer data. The disadvantage here is the need for some kind of card based on FPGA that works as a translator from Aurora to PCI-E.